/*
 *Copyright (c) 2024 Black Sesame Technologies
 *
 *Licensed under the Apache License, Version 2.0 (the "License");
 *you may not use this file except in compliance with the License.
 *You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 *Unless required by applicable law or agreed to in writing, software
 *distributed under the License is distributed on an "AS IS" BASIS,
 *WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 *See the License for the specific language governing permissions and
 *limitations under the License.
*/
#ifndef R5_LSP_CRM_FUNC_H
#define R5_LSP_CRM_FUNC_H

#include "RegBase.h"
#include "../library/utility_lite.h"
#include "../library/RegTest.h"
#include "../library/types.h"
#include "swt_lsp_crm_reg_table.h"

typedef enum{
    LSP_LIN_10M = 0,
    LSP_LIN_WCLK_SEL
}lsp_lin_wclk_sel_e;

typedef enum{
    LSP_WCLK_200M = 0,
    LSP_WCLK_100M
}lsp_wclk_sel_e;

typedef enum{
    LSP_WDATA_PARITY_IRQ_MASK,
    LSP_ADDR_PARITY_IRQ_MASK,
    LSP_WDATA_PARITY_IRQ_CLR,
    LSP_ADDR_PARITY_IRQ_CLR,
    LSP_RDATA_PARITY_ERR_INJECT,
    LSP_WDATA0_PARITY_IRQ,
    LSP_WDATA1_PARITY_IRQ,
    LSP_WDATA2_PARITY_IRQ,
    LSP_WDATA3_PARITY_IRQ,
    LSP_WDATA4_PARITY_IRQ,
    LSP_WDATA5_PARITY_IRQ,
    LSP_WDATA6_PARITY_IRQ,
    LSP_WDATA7_PARITY_IRQ,
    LSP_WDATA8_PARITY_IRQ,
    LSP_WDATA9_PARITY_IRQ,
    LSP_WDATAA_PARITY_IRQ,
    LSP_ADDR_PARITY_IRQ,
    RAY1_HRDATA_PARITY_IRQ_MASK,
    RAY1_HRDATA_PARITY_IRQ_CLR,
    RAY1_HWDATA_PARITY_ERR_INJECT,
    RAY1_HADDR_PARITY_ERR_INJECT,
    RAY1_HRDATA_PARITY_IRQ,
    RAY0_HRDATA_PARITY_IRQ_MASK,
    RAY0_HRDATA_PARITY_IRQ_CLR,
    RAY0_HWDATA_PARITY_ERR_INJECT,
    RAY0_HADDR_PARITY_ERR_INJECT,
    RAY0_HRDATA_PARITY_IRQ,
    RAY1_WDATA_PARITY_IRQ_MASK,
    RAY1_ADDR_PARITY_IRQ_MASK,
    RAY1_WDATA_PARITY_IRQ_CLR,
    RAY1_ADDR_PARITY_IRQ_CLR,
    RAY1_RDATA_PARITY_ERR_INJECT,
    RAY1_WDATA_PARITY_IRQ,
    RAY1_ADDR_PARITY_IRQ,
    RAY0_WDATA_PARITY_IRQ_MASK,
    RAY0_ADDR_PARITY_IRQ_MASK,
    RAY0_WDATA_PARITY_IRQ_CLR,
    RAY0_ADDR_PARITY_IRQ_CLR,
    RAY0_WDATA_PARITY_IRQ,
    RAY0_ADDR_PARITY_IRQ,
    RAY0_RDATA_PARITY_ERR_INJECT,
}lsp_parity_ctrl_e;

typedef enum{
    LSP_WDT_DW_WDT = 0,
    LSP_WDT_WWDG
}lsp_wdt_mode_sel_e;

typedef enum{
    LSP_M_SSP_0 = 0x01,
    LSP_M_SSP_1 = 0x02,
    LSP_M_SSP_3 = 0x04,
    LSP_M_SSP_4 = 0x08,
}lsp_ssp_cs_cfg_e;

typedef enum
{
    LSP_CH_LSP0 = 0x00,
    LSP_CH_LSP1 = 0x01
}lsp_ch_cfg_e;

/****************gic *************************/
extern unsigned int get_int_num_by_reg_base(unsigned int reg_base);
extern unsigned int get_int_num_by_reg_base_with_ch(unsigned int reg_base, unsigned int ch);
extern unsigned int get_addr_by_int_num(unsigned int int_num);

/****************r5 crm **********************/
extern void wdg_reset_mask_ctrl(unsigned int reg_base, unsigned int ctrl);

/****************lsp sw reset*****************/
extern void lsp_wdt_sw_reset(unsigned int reg_base);
extern void lsp_ray_sw_reset(unsigned int reg_base);
extern void lsp_timer_sw_reset(unsigned int reg_base, unsigned int ch);
extern void lsp_lin_sw_reset(unsigned int reg_base);

extern void lsp_wdt_mode_sel(lsp_ch_cfg_e lsp_ch, lsp_wdt_mode_sel_e mode_sel);
extern unsigned int lsp_ray_stb_state_read(unsigned int reg_base);
extern void lsp_lin_wclk_sel(lsp_ch_cfg_e lsp_ch, lsp_lin_wclk_sel_e wclk_sel);
extern void lsp_lsp_wclk_sel(lsp_ch_cfg_e lsp_ch, lsp_wclk_sel_e wclk_sel);
extern void lsp_parity_cfg_ctrl(lsp_parity_ctrl_e parity, u8 ctrl);
extern u8 lsp_parity_status_read(lsp_parity_ctrl_e parity);
extern void lsp_wdt_pause_mode_ctrl(unsigned int reg_base,u8 ctrl);
extern void lsp_wdt_speed_up_mode_ctrl(unsigned int reg_base,u8 ctrl);
extern void lsp_timer_pause_mode_ctrl(unsigned int reg_base, unsigned int ch, u8 ctrl);

#endif
